1. Field of the Invention
The present invention relates to a resin sealed semiconductor device, more particularly, to a multi-chip resin sealed semiconductor device incorporating an output semiconductor element and a controlling semiconductor element for controlling the output semiconductor element in a single package for use in vehicles and the like.
2. Description of the Related Arts
FIG. 7 is a schematic plan view illustrating a conventional multi-chip resin sealed semiconductor device. FIG. 8 is a side view thereof. Referring to these figures, onto a die pad of a lead frame 1 is fixed an output semiconductor element 5 by soldering and the like. On a lead 3 of the lead frame is fixed a controlling semiconductor element 7 for controlling the output semiconductor element 5 by soldering and the like. The controlling semiconductor element 7 and the leads 2 through 4 are electrically connected by means of wires 9.
Between the leads 2 and 3 is fixed by soldering and the like a chip resistance 6 which detects current flowing in the output semiconductor element 5. Excluding the tips of the leads 1 through 4, the resin sealed semiconductor device is sealed with protecting molded resin 8. The die pad of the lead frame 1 has a tapped hole 10 for securing the resin sealed semiconductor device using screws and the like.
The conventional resin sealed semiconductor device has the above-described structure. Current which is applied to this device is input from the lead 1 (power supply 13 in FIG. 10), and flows from the output semiconductor element used for switching through the wire 9 and to the lead 2. Then, it flows through a chip resistance 6 to the lead 3 (ground 14 in the same figure). At this time, voltage which is generated across the chip resistance 6, which has a low resistance value of a approximately a few tens of m.OMEGA., allows the value of the current flowing in the chip resistance 6 to be detected, so that based on this current value the current can be controlled by the controlling semiconductor element 7.
FIG. 9 illustrates an equivalent circuit in the mounting section of the chip resistance 6. FIG. 10 illustrates equivalent circuits in a current path. In these figures, the resistance value of the chip resistance 6 is represented as R.sub.6. Resistance which develops by mounting the chip resistance 6 is expressed as resistance 11, and the value thereof is expressed as R. Accordingly, as a result of mounting the chip resistance 6 onto the leads 2 and 3, the total resistance value, R, of the current-detecting resistance is R.sub.6 +.DELTA.R.sub.6.
If the current which flows in the chip resistance 6 is taken as IE, then the consumed power, W.sub.6, is IE.sup.2 R.sub.6 +IE.sup.2 .DELTA.R.sub.6.
As described above, in the resin sealed semiconductor device, mounting a low resistance chip resistance 6 makes it difficult to accurately detect the current value even when the chip resistance 6 has high precision with respect to resistance values because the resistance value is increased by soldering the mounting section and the like.